Fan Out Wafer Level Packaging (FOWLP) is a wafer-level packaging technique which allows the production of devices comprising multiple dies and passive components. The technique provides a device with a reduced footprint and an increased area for solder ball connection points.
A FOWLP device can be formed by dicing a semiconductor wafer into individual die which are flipped onto an adhesive carrier (with the pad side facing the carrier) at a required spacing. The dies are then overmoulded with an epoxy material to form a reconstituted wafer which is a composite of the dies within the epoxy mold compound. The reconstituted wafer is removed from the carrier and polymer passivation and metal layers are then defined over the wafer. These define circuitry and provide connection points for mounting of the device to a PCB. The reconstituted wafer is then diced into individual devices which may be mounted in the conventional manner on PCBs.
The production technique allows multiple dies and passives to be integrated into a single device by placing the dies and passives in the required locations and dicing the reconstituted wafer as required.
The production technique also has a number of disadvantages. The epoxy material utilised to mould the wafer provides strength and stability to the device. Materials are selected to perform these functions rather than for their range of electrical properties which is limited, particularly at RF and microwave frequencies.
Passive components utilised in FOWLPs are typically conventional surface mount devices. The choice of device is limited by a restriction to Cu terminals, not solderable 0201 devices are the smallest that can be embedded, thereby limiting the minimum footprint, which is compounded by the size of the contact bands on such components. Only standard, common, values are available also limiting flexibility of design and RF performance.
There is a requirement for a FOWLP device incorporating passive components with improved performance and design freedom.